MacSpice User's Guide

Table of Contents

• 1. INTRODUCTION
  • 1.1. TYPES OF ANALYSIS
    • 1.1.1. DC Analysis
    • 1.1.2. AC Small-Signal Analysis
    • 1.1.3. Transient Analysis
    • 1.1.4. Pole-Zero Analysis
    • 1.1.5. Small-Signal Distortion Analysis
    • 1.1.6. Sensitivity Analysis
    • 1.1.7. Noise Analysis
  • 1.2. ANALYSIS AT DIFFERENT TEMPERATURES
  • 1.3. CONVERGENCE
• 2. CIRCUIT DESCRIPTION
  • 2.1. GENERAL STRUCTURE AND CONVENTIONS
  • 2.2. TITLE LINE, COMMENT LINES AND .END LINE
    • 2.2.1. Title Line
    • 2.2.2. .END Line
    • 2.2.3. Comments
  • 2.3. DEVICE MODELS
  • 2.4. SUBCIRCUITS
    • 2.4.1. .SUBCKT Line
    • 2.4.2. .ENDS Line
    • 2.4.3. Subcircuit Calls
  • 2.5. COMBINING FILES: .INCLUDE LINES
• 3. CIRCUIT ELEMENTS AND MODELS
  • 3.1. ELEMENTARY DEVICES
    • 3.1.1. Resistors
    • 3.1.2. Semiconductor Resistors
    • 3.1.3. Semiconductor Resistor Model (R)
    • 3.1.4. Capacitors
    • 3.1.5. Semiconductor Capacitors
    • 3.1.6. Semiconductor Capacitor Model (C)
    • 3.1.7. Inductors
    • 3.1.8. Coupled (Mutual) Inductors
    • 3.1.9. Switches
    • 3.1.10. Switch Model (SW/CSW)
  • 3.2. VOLTAGE AND CURRENT SOURCES
    • 3.2.1. Independent Sources
      • 3.2.1.1. Pulse
      • 3.2.1.2. Sinusoidal
      • 3.2.1.3. Exponential
      • 3.2.1.4. Piece-Wise Linear
      • 3.2.1.5. Single-Frequency FM
    • 3.2.2. Linear Dependent Sources
      • 3.2.2.1. Linear Voltage-Controlled Current Sources
      • 3.2.2.2. Linear Voltage-Controlled Voltage Sources
      • 3.2.2.3. Linear Current-Controlled Current Sources
      • 3.2.2.4. Linear Current-Controlled Voltage Sources
    • 3.2.3. Non-linear Dependent Sources
  • 3.3. TRANSMISSION LINES
    • 3.3.1. Lossless Transmission Lines
    • 3.3.2. Lossy Transmission Lines
    • 3.3.3. Lossy Transmission Line Model (LTRA)
    • 3.3.4. Uniform Distributed RC Lines (Lossy)
    • 3.3.5. Uniform Distributed RC Model (URC)
    • 3.3.6. KSpice Transmission Line Models
      • 3.3.6.1 Simple Lossy Transmission Model (TXL)
      • 3.3.6.2 Simple Coupled Multiconductor Model (CPL)
  • 3.4. TRANSISTORS AND DIODES
    • 3.4.1. Junction Diodes
    • 3.4.2. Diode Model (D)
    • 3.4.3. Bipolar Junction Transistors (BJTs)
    • 3.4.4. BJT Models (NPN/PNP)
    • 3.4.5. Junction Field-Effect Transistors (JFETs)
    • 3.4.6. JFET Models (NJF/PJF)
    • 3.4.7. MOSFETs
    • 3.4.8. MOSFET Models (NMOS/PMOS)
    • 3.4.9. MESFETs
    • 3.4.10. MESFET Models (NMF/PMF)
• 4. ANALYSES AND OUTPUT CONTROL
  • 4.1. SIMULATOR VARIABLES (.OPTIONS)
  • 4.2. INITIAL CONDITIONS
    • 4.2.1. .NODESET: Specify Initial Node Voltage Guesses
    • 4.2.2. .IC: Set Initial Conditions
  • 4.3. ANALYSES
    • 4.3.1. .AC: Small-Signal AC Analysis
    • 4.3.2. .DC: DC Transfer Function
    • 4.3.3. .DISTO: Distortion Analysis
    • 4.3.4. .NOISE: Noise Analysis
    • 4.3.5. .OP: Operating Point Analysis
    • 4.3.6. .PZ: Pole-Zero Analysis
    • 4.3.7. .SENS: DC or Small-Signal AC Sensitivity Analysis
    • 4.3.8. .TF: Transfer Function Analysis
    • 4.3.9. .TRAN: Transient Analysis
  • 4.4. BATCH OUTPUT
    • 4.4.1. .SAVE Lines
    • 4.4.2. .PRINT Lines
    • 4.4.3. .PLOT Lines
    • 4.4.4. .FOUR: Fourier Analysis of Transient Analysis Out-
• 5. INTERACTIVE INTERPRETER
  • 5.1. EXPRESSIONS, FUNCTIONS, AND CONSTANTS
  • 5.2. COMMAND INTERPRETATION
  • 5.3. COMMANDS
    • 5.3.1. Ac*: Perform an AC, small-signal frequency response
    • 5.3.2. Alias: Create an alias for a command
    • 5.3.3. Alter*: Change a device or model parameter
    • 5.3.am Altermod*: Change a model parameter
    • 5.3.ap Applescript: Compile and run Applescript
    • 5.3.4. Asciiplot: Plot values using old-style character
    • 5.3.5. Aspice: Asynchronous spice run
    • 5.3.6. Bug: Mail a bug report
    • 5.3.7. Cd: Change directory
    • 5.3.co Compose: Compose a vector
    • 5.3.cs Cross: Create a vector
    • 5.3.8. Destroy: Delete a data set
    • 5.3.9. Dc*: Perform a DC-sweep analysis
    • 5.3.10. Define: Define a function
    • 5.3.dt Deftype: Define type of plot or vector
    • 5.3.dc Delcirc: Delete a circuit
    • 5.3.11. Delete*: Remove a trace or breakpoint
    • 5.3.12. Diff: Compare vectors
    • 5.3.13. Display: List known vectors and types
    • 5.3.du. Dump: Print node voltages
    • 5.3.14. Echo: Print text
    • 5.3.15. Edit*: Edit the current circuit
    • 5.3.16. Fourier: Perform a fourier transform
    • 5.3.17. Hardcopy: Save a plot to a file for printing
    • 5.3.18. Help: Print summaries of Spice3 commands
    • 5.3.19. History: Review previous commands
    • 5.3.20. Iplot*: Incremental plot
    • 5.3.21. Jobs: List active asynchronous spice runs
    • 5.3.22. Let: Assign a value to a vector
    • 5.3.23. Linearize*: Interpolate to a linear scale
    • 5.3.24. Listing*: Print a listing of the current circuit
    • 5.3.25. Load: Load rawfile data
    • 5.3.no. Nodesets*: Create a file of .nodeset statements
    • 5.3.ns. Noise*: Perform a noise analysis
    • 5.3.26. Op*: Perform an operating point analysis
    • 5.3.27. Plot: Plot values on the display
    • 5.3.28. Print: Print values
    • 5.3.pz. PZ: Pole-Zero Analysis
    • 5.3.29. Quit: Leave Spice3 or Nutmeg
    • 5.3.30. Rehash: Reset internal hash tables
    • 5.3.31. Reset*: Reset an analysis
    • 5.3.32. Reshape: Alter the dimensionality or dimensions of
    • 5.3.33. Resume*: Continue a simulation after a stop
    • 5.3.34. Rspice: Remote spice submission
    • 5.3.35. Run*: Run analysis from the input file
    • 5.3.36. Rusage: Resource usage
    • 5.3.37. Save*: Save a set of outputs
    • 5.3.38. Sens*: Run a sensitivity analysis
    • 5.3.39. Set: Set the value of a variable
    • 5.3.40. Setcirc*: Change the current circuit
    • 5.3.41. Setplot: Switch the current set of vectors
    • 5.3.ss. Setscale: Set the scale vector for current plot
    • 5.3.42. Settype: Set the type of a vector
    • 5.3.43. Shell: Call the command interpreter
    • 5.3.44. Shift: Alter a list variable
    • 5.3.45. Show*: List device state
    • 5.3.46. Showmod*: List model parameter values
    • 5.3.47. Source: Read a Spice3 input file
    • 5.3.sp. Spec: Create a frequency domain plot
    • 5.3.48. Status*: Display breakpoint information
    • 5.3.49. Step*: Run a fixed number of timepoints
    • 5.3.50. Stop*: Set a breakpoint
    • 5.3.sc. Strcmp: Compare strings
    • 5.3.51. Tf*: Run a Transfer Function analysis
    • 5.3.52. Trace*: Trace nodes
    • 5.3.53. Tran*: Perform a transient analysis
    • 5.3.54. Transpose: Swap the elements in a multi-dimensional
    • 5.3.55. Unalias: Retract an alias
    • 5.3.56. Undefine: Retract a definition
    • 5.3.57. Unset: Clear a variable
    • 5.3.58. Version: Print the version of Spice
    • 5.3.59. Where: Identify troublesome node or device
    • 5.3.60. Write: Write data to a file
    • 5.3.61. Xgraph: use the xgraph(1) program for plotting.
  • 5.4. CONTROL STRUCTURES
    • 5.4.1. While - End
    • 5.4.2. Repeat - End
    • 5.4.3. Dowhile - End
    • 5.4.4. Foreach - End
    • 5.4.5. If - Then - Else
    • 5.4.6. Label
    • 5.4.7. Goto
    • 5.4.8. Continue
    • 5.4.9. Break
    • 5.4.10 User Interrupts
  • 5.5. VARIABLES
  • 5.6. MISCELLANEOUS
  • 5.7. BUGS
• 6. BIBLIOGRAPHY
• APPENDIX A: EXAMPLE CIRCUITS
  • A.1. Circuit 1: Differential Pair
  • A.2. Circuit 2: MOSFET Characterization
  • A.3. Circuit 3: RTL Inverter
  • A.4. Circuit 4: Four-Bit Binary Adder
  • A.5. Circuit 5: Transmission-Line Inverter
• APPENDIX B: MODEL AND DEVICE PARAMETERS
  • B.1. URC: Uniform R.C. line
  • B.2. ASRC: Arbitrary Source
  • B.3. BJT: Bipolar Junction Transistor
  • B.4. BSIM1: Berkeley Short Channel IGFET Model
  • B.5. BSIM2: Berkeley Short Channel IGFET Model
  • B.6. Capacitor: Fixed capacitor
  • B.7. CCCS: Current controlled current source
  • B.8. CCVS: Linear current controlled current source
  • B.9. CSwitch: Current controlled ideal switch
  • B.10. Diode: Junction Diode model
  • B.11. Inductor: Inductors
  • B.12. Mutual: Mutual inductors
  • B.13. Isource: Independent current source
  • B.14. JFET: Junction Field effect transistor
  • B.15. LTRA: Lossy transmission line
  • B.16. MES: GaAs MESFET model
  • B.17. Mos1: Level 1 MOSfet model with Meyer capacitance
  • B.18. Mos2: Level 2 MOSfet model with Meyer capacitance
  • B.19. Mos3: Level 3 MOSfet model with Meyer capacitance
  • B.20. Mos6: Level 6 MOSfet model with Meyer capacitance
  • B.21. Resistor: Simple linear resistor
  • B.22. Switch: Ideal voltage controlled switch
  • B.23. Tranline: Lossless transmission line
  • B.24. VCCS: Voltage controlled current source
  • B.25. VCVS: Voltage controlled voltage source
  • B.26. Vsource: Independent voltage source
• APPENDIX C: SPICE2 NONLINEAR DEPENDENT SOURCES
  • C.1. Voltage-Controlled Current Sources
  • C.2. Voltage-Controlled Voltage Sources
  • C.3. Current-Controlled Current Sources
  • C.4. Current-Controlled Voltage Sources
• APPENDIX D: SPICE3 HISTORY SUBSTITUTION

This User's Guide is based on text in the Version 3f User's Manual:

• Copyright (c) 1985-1991 The Regents of the University of California. All rights reserved.

Corrections, additions, and HTML mark-up added in order to create this work are

• Copyright © (1998 onwards) Charles D. H. Williams. All rights reserved.